1. Field of Invention
The present invention relates to a method for manufacturing of a semiconductor device. More particularly, the present invention relates to the method for manufacturing a gate terminal.
2. Description of Related Art
Metallic gate terminals are now extensively used in the fabrication of the gate of a metal oxide semiconductor (MOS) device. This is because the metallic gate terminal has a low resistance; moreover, no extra impurities implantation is necessary for increasing its electrical conductivity. Tungsten is one of the most commonly used materials for forming the gate terminal.
Generally, the metallic tungsten layer is deposited using plasma or laser-enhanced chemical vapor deposition method, or a physical sputtering method. However, during the process of depositing tungsten using plasma or laser-enhanced chemical vapor deposition method, the settling location of the metallic atoms being bombarded by the plasma or laser is difficult to control.
Furthermore, there will be some other impurities having enough energy to settle onto the gate terminal, thereby leading to a poor gate oxide layer and increasing the resistance of the gate terminal. Using a low pressure chemical vapor deposition method is able somehow to prevent the defects of poor gate oxide quality and increased resistance in plasma or laser-enhanced chemical vapor deposition method. However, a rather high temperature of greater than 350.degree. C. are often necessary to deposit tungsten layer over the gate oxide layer. Hence, processing difficulties are increased.
FIGS. 1A through 1D are cross-sectional views showing the progression of manufacturing steps in the fabrication of a conventional gate terminal. First, as shown in FIG. 1A, a substrate 10 is provided. Then, a shallow trench isolation structure 12 and a well (not shown) are formed in the substrate 10.
Next, as shown in FIG. 1B, a gate oxide layer 14 is formed over the substrate 10, for example, using a thermal oxidation method. Subsequently, a sputtering method is used to form a tungsten layer 16 over the gate oxide layer 14. Then, the tungsten layer 16 and the gate oxide layer 14 are patterned to form a gate terminal. The tungsten layer 16 can be patterned, for example, by first coating a photoresist layer (not shown) over the tungsten layer 16 while exposing specific portions of the tungsten layer 16. Next, a reactive ion etching (RIE) method is used to remove the exposed tungsten layer 16, and then the gate oxide layer 14 is further etched until the substrate 10 is reached. Later, the photoresist layer is removed.
Next, as shown in FIG. 1D, subsequent processes are carried out. Ions of low concentration level are then implanted into the substrate on each side of the gate forming lightly doped source/drain regions 17. Thereafter, an oxide layer is formed over the gate and the substrate 10, for example, using a low pressure chemical vapor deposition method. Next, the oxide layer is anisotropically etched back to form spacers 18 on the sidewalls of the gate using a plasma etching-back method. Using the spacers 18 as masks, highly concentrated ions are then implanted into the substrate on the side of each spacer to form heavily doped source/drain regions 19.
Since a rather high temperature of greater than 350.degree. C. is necessary to deposit a tungsten layer over the gate oxide layer in order to form an electrode, semiconductor processing difficulties are increased.
Furthermore, since the etching process used in a conventional method of patterning the tungsten layer 16 to form a gate electrode is not easy to control, the correct gate dimensions are difficult to get.
In light of the foregoing, there is a need in the art for an improved method for forming a gate terminal.